EN0-001 Online Practice Questions and Answers

When the processor is executing in Thumb state, which of the following statements is correct about the values stored in R15?

A. Bits[31:16] are duplicated with bits[15:0]

B. The PC value is stored in bits[31:1] and bit[0] is treated as zero

C. The PC value is stored in bits[31:16] and bits[15:0] are undefined

D. The PC value is stored in bits[15:0] and bits[31:16] are undefined

It is common to declare structures as "packed" in order to minimize data memory size. Which of the following accurately describes the effect of this?

A. Members will be stored as bit-fields

B. Data Aborts will be disabled for all structure accesses

C. Structure members will be re-ordered so that the smallest are first

D. Multi-byte members are not required to be naturally aligned

According to the AAPCS (with soft floating point linkage), when the caller "func" calls sprintf, where is the

value of the parameter "x" placed?

#include

void func(double x, int i , char *buffer)

{

sprintf(buffer, "pass %d: value = %f\n", i, x); }

A. Split between register R3 and 4 bytes on the stack

B. Split between registers R3 and R4

C. 8 bytes on the stack

D. VFP Register D0

According to the EABI. what would the C size of () operator return when given the following structure?

A. 19

B. 20

C. 24

D. 28

What type of debug point would you set when debugging flash memory or ROM?

A. Start point

B. Step point

C. Hardware breakpoint

D. Software breakpoint

Which one of these statements is TRUE about code running on final hardware without a debugger attached?

A. FIQ exceptions must not be taken

B. The instruction cache must be enabled

C. Global variables must be initialized to zero

D. The Reset Vector must reside in non-volatile memory

Which of the following is an external exception?

A. Supervisor Call

B. FIQ

C. Undefined Instruction

D. Parity

An ARM processor connected to a Generic Interrupt Controller (GIC) is handling an active interrupt 11. A new interrupt 12 that is received at the GIC is forwarded to the processor, and the active interrupt 11 is preempted. Which of the following possible values of 11's priority (P1), 12's priority (P2) and the processor's priority mask (PM) permit this to happen? Assume there are 256 priority levels implemented.

A. P1 = 0x0F, P2 = 0x10, PM = 0xFF

B. P1 = 0x10, P2 = 0x0F, PM = 0xFF

C. P1 =0x0F, P2 = 0x10. PM = 0x0

D. P1 = 0x10, P2 = 0x0F, PM = 0x0

The disassembly of a program written in C shows calls to the function__aeabi_fadd. Which one of these compiler floating point options could have been used?

A. Hard floating-point linkage

B. Soft floating-point linkage without floating-point hardware

C. Hard floating-point linkage with optimization for space

D. Soft floating-point linkage with floating-point hardware

Which of these C99 keywords can be used to indicate that two arrays do not overlap?

A. "pure"

B. "volatile"

C. "static"

D. "restrict"