HP HP2-T16 Exam Questions & Answers

Correct Answer: BCE

{\rtf1\ansi\ansicpg936\deff0\deflang1033\deflangfe2052{\fonttbl{\f0\fnil\fcharset0 MS Shell Dlg 2;}} \viewkind4\uc1\pard\lang2052\f0\fs17 Industry Standard Architecture - Student Guide 1 - Page 86\par In a virtual machine environment, a software layer abstracts the physical server hardware and creates one or more virtual machine instances, each with its own virtual drives, virtual network interface controllers (NICs), virtual storage controllers, virtual processors, OS, and application(s). The software abstraction layer is typically referred to as a hypervisor or a virtual machine monitor. An OS that runs in the virtual machine instance is called a guest OS.\par }

Correct Answer: ADE

{\rtf1\ansi\ansicpg936\deff0\deflang1033\deflangfe2052{\fonttbl{\f0\fnil\fcharset0 MS Shell Dlg 2;}} \viewkind4\uc1\pard\lang2052\f0\fs17 Industry Standard Architecture - Student Guide 2 - Page 251\par Performance evaluation tools\par Red Hat and SuSE Linux include a variety of resource monitoring tools including:\par Free top\par GNOME System Monitor (a more graphically oriented version of top)\par vmstat\par Sysstat suite of resource monitoring tools\par }

Correct Answer: B

{\rtf1\ansi\ansicpg936\deff0\deflang1033\deflangfe2052{\fonttbl{\f0\fnil\fcharset0 MS Shell Dlg 2;}} \viewkind4\uc1\pard\lang2052\f0\fs17 Industry Standard Architecture - Student Guide 1 - Page 124:\par Bank interleaving\par SDRAM divides memory into two to four banks for simultaneous access to more data.\par This division and simultaneous access is known as interleaving.\par In two-way interleaving while one memory bank is being accessed, the other bank remains ready to be accessed. Thus the processor can initiate a new memory access before the previous access has been completed, resulting in continuous data flow and increasing the amount of data accessed in a single memory access. \par When data is written to memory, the memory controller distributes the data across DIMMs in a bank. When the processor sends a read request to the memory controller, the memory controller sends the request to all DIMMs in the bank simultaneously. The data at the requested address is returned along with data from subsequent sequential addresses. The memory controller interleaves the data from all the DIMMs to put it back in its original order.\par Because more than one DIMM is used in this transaction, the amount of data that can be written or read is larger than if a single DIMM were used. For example, in dual-interleaved memory, where two DIMMs are used, the processor can read and write twice the amount of data in one memory access. In four-way interleaved memory, the processor can read and write four times the amount of data in one memory access.\par }